Quad data rate (or quad pumping) is a communication signaling technique wherein data is transmitted at both the rising and falling edges of the clock signal, much the same way DDR technology works, but with two clock signals 90° out of phase from each other, effectively delivering 4 bits of data per clock cycle.

The technology was introduced by Intel in their Willamette core Pentium 4 CPU, and is currently employed in their Pentium 4, Celeron, Pentium D, and Core 2 Processor ranges. This technology has allowed Intel to produce chipsets and microprocessors which can communicate with each other at data rates expected of the traditional FSB technology running from 400 MT/s to 1600 MT/s, while maintaining a lower and stable actual clock frequency of 100 MHz to 400 MHz.

See also

• Double data rate
• Pumping (computer systems)

fr:Quad Pumped it:Quad pumped

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